//------------------------------------------------------------------------------
//  The confidential and proprietary information contained in this file may
//  only be used by a person authorised under and to the extent permitted
//  by a subsisting licensing agreement from ARM Limited or its affiliates.
//
//         (C) COPYRIGHT 2018-2019 ARM Limited or its affiliates.
//             ALL RIGHTS RESERVED
//
//  This entire notice must be reproduced on all copies of this file
//  and copies of this file may only be made by a person if such person is
//  permitted to do so under the terms of a subsisting license agreement
//  from ARM Limited or its affiliates.
//
//  Release Information : Cortex-A53_STL-r0p0-00eac0
//
//------------------------------------------------------------------------------
//===========================================================================================
//   About: About the File
//      A53_STL user global variables configuration file
//
//   About: Supported Configurations
//      All configurations
//
//   About: Assumption of Use
//      All global assumptions of use apply
//      Local assumptions of use: NONE
//
//   About: TEST_ID
//      N.A.
//
//===========================================================================================//

//#include <stdint.h>

#include "../inc/a53_stl_global_defs.h"
#include "../inc/a53_stl_arrays.h"
#include "../inc/a53_stl.h"

// Bitmap Array for executable tests at EL1 on RT execution mode
const a53_stl_cfg_t a53_stl_modules_EL1[A53_STL_EL1_TOT_MODULES_MAX] = {
    // Run mode      idTest
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_001},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_002},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_003},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_004},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_005},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_006},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_007},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_008},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_009},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_010},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_011},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_012},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_013},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_014},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_015},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_016},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_017},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_018},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_019},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_020},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_021},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_022},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_023},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_024},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_025},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_026},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_027},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_028},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_029},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_030},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_031},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_032},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_033},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_034},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_041},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_042},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_043},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_044},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_045},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_046},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_047},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_048},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_049},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_050},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL1_CORE_ID_051},
};

// Bitmap Array for executable tests at EL2 on RT execution mode
const a53_stl_cfg_t a53_stl_modules_EL2[A53_STL_EL2_TOT_MODULES_MAX] = {
    // Run mode      idTest
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_001},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_002},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_003},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_004},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_005},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_006},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_007},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_008},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_009},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_010},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_011},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_012},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_013},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_014},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_015},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_016},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_017},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_018},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_019},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_020},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_021},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_022},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_023},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_024},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_025},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_026},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_027},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_028},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_029},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_030},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_031},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_032},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_033},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_034},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_041},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_042},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_043},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_044},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_045},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_046},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_047},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_048},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_049},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_050},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL2_CORE_ID_051},
};

// Bitmap Array for executable tests at EL3 on RT execution mode
const a53_stl_cfg_t a53_stl_modules_EL3[A53_STL_EL3_TOT_MODULES_MAX] = {
    // Run mode      idTest
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL3_CORE_ID_040},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL3_CORE_ID_039},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL3_CORE_ID_038},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL3_CORE_ID_037},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL3_CORE_ID_036},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL3_CORE_ID_035},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL3_CORE_ID_052},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL3_CORE_ID_053},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL3_CORE_ID_054},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL3_GIC_ID_001},
    {A53_STL_RT_MODE | A53_STL_OOR_MODE, A53_STL_CASE_EL3_GIC_ID_002},
};

